Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Search - vhdl jpeg

Search list

[VHDL-FPGA-Verilog] DCT

Description: 用verilog语言实现DCT编解码 附有DCT的说明-Using Verilog language realize DCT codec with a description of DCT
Platform: | Size: 65536 | Author: 周韧研 | Hits:

[VHDL-FPGA-Verilog] fifo8_8

Description:
Platform: | Size: 1024 | Author: 李松 | Hits:

[VHDL-FPGA-Verilog] project4Xilinx

Description: vga code for xilinx
Platform: | Size: 1867776 | Author: kamal | Hits:

[VHDL-FPGA-Verilog] jpeg_ashu.tar

Description: its is jpeg interface in vhdl
Platform: | Size: 3416064 | Author: ashu | Hits:

[VHDL-FPGA-Verilog] VHDLMQP04

Description: VHDL Implementation of the JPEG-LS Algorithm
Platform: | Size: 1103872 | Author: thabet1983 | Hits:

[VHDL-FPGA-Verilog] DDDCCT_IDCTi

Description: 离散余弦变换及反离散余弦变换的HDL代码及测试文件。包含VHDL及及Verilog版本。可用途JPEG及MEPG压缩算法 已通过测试。 -The discrete cosine transform and inverse discrete cosine transform HDL code and test files. Contains VHDL and Verilog versions. Can use JPEG and MEPG compression of algorithm has been tested.
Platform: | Size: 30720 | Author: | Hits:

[VHDL-FPGA-Verilog] mkjpeg.tar

Description: 用FPGA实现的JPEG编码器，可以直接使用，内含完成说明文档，经过验证无误。-• JPEG baseline encoding JPEG ITU-T T.81 | ISO/IEC 10918-1 • Standard JFIF header v 1.01 automatic generation • Color images only (3 components, RGB 24 or 16 bit, YUV input) • Two programmable Quantization tables • Hardcoded Huffman tables (luminance and chrominance) • 2.3 to 2.7 clock cycles per one input 24 bit pixel @ 50 Quality • OPB programming and data Host interface • 4:2:2 subsampling • Source code target independent, synthesizable RTL VHDL code • Detailed documentation
Platform: | Size: 21650432 | Author: | Hits:

[Compress-Decompress algrithms] jpeg_vhdl

Description: vhdl实现静态图像压缩JPEG的主要程序。基于FPGA芯片。-VHDL fpga
Platform: | Size: 288768 | Author: 李娜 | Hits:

[LabView] oc_mkjpeg_rev61_subsampling

Description: JPEG encoder USING vhdl CODE TO RUN FOR CHECKING THE IMAGE COMPRESSION
Platform: | Size: 2017280 | Author: ravikantsinha111 | Hits:

[Other] zigzag

Description: ZigZag Transform Used in Jpeg Convert IN VHDL LANGUAGE
Platform: | Size: 3072 | Author: Mehdi Souri | Hits:

[VHDL-FPGA-Verilog] jpegencoder

Description: jpeg encoder in vhdl including modules MAC, Wavelet encoder, filter bank, image to text converter
Platform: | Size: 3072 | Author: SUDHIR | Hits:

[Compress-Decompress algrithms] golomb2

Description: JPEG-LS无损压缩算法中的golomb2编码源代码，采用VHDL编程。-JPEG-LS lossless compression algorithm in the golomb2 coding source code, using VHDL programming
Platform: | Size: 2048 | Author: Tangyao | Hits:
« 1 2 3 4 5»

CodeBus www.codebus.net